After the close on April 23, 2026, Intel CEO Lip-Bu Tan said something that mattered on the Q1 earnings call.
“The CPU is reasserting itself as the indispensable foundation of the AI era. The CPU now serves as the orchestration layer and critical control plane for the entire AI stack.”
The message: CPUs are moving back to the center of AI infrastructure.
The market reacted immediately.
The next day Intel jumped +23.6%, AMD +13.9%, ARM about +14%, Qualcomm +11%, and even NVIDIA was up +4.3%.
The Philadelphia Semiconductor Index crossed 10,000 for the first time.
What mattered more was CFO David Zinsner’s framing. As AI workloads shift from training to inference and then to agentic AI, the GPU-to-CPU ratio could tighten dramatically. Per outside reporting, the training era ran on roughly 1 CPU per 7 to 8 GPUs. Inference brings that down to 1 per 3 to 4. Once agentic AI scales out, it could move to 1-to-1 or higher.
If you’ve been reading my articles, you already know I’ve been arguing for months that CPU becomes a clear bottleneck in the agentic AI era. That thesis is finally getting priced in.
Don’t jump straight from this to “every company that sells a lot of CPUs is a winner.” A higher CPU ratio doesn’t automatically pull CPU ASP (Average Selling Price, the average revenue per chip) and margin up with it.
What hyperscalers want might be the highest-performing x86 CPU. It might also be lower power, lower TCO, enough host CPU to orchestrate GPUs, more memory bandwidth, easier software integration.
So the real question for this cycle isn’t simply “who sells the most CPUs.”
Who can convert rising CPU demand into their own profit pool most effectively.
This piece walks through the technical differences between ARM, x86, and RISC-V, the monetization structure of data center CPUs, what CPUs actually do in agentic AI, and how Intel, AMD, NVIDIA, ARM, and Qualcomm each get paid in this cycle.
Disclaimer
This article is for informational purposes only. It is not a recommendation to buy or sell any security. Every investment decision and its outcome belongs to the reader.
CPUs Have a Language: What ISA Really Is
A CPU is a machine that decodes and executes the instructions software hands it. The agreement that defines what those instructions look like and how they get exchanged is the ISA, or Instruction Set Architecture. Think of it as the language between the CPU and the compiler.
The same C code compiled for x86 produces an x86 binary. Compiled for ARM, it produces an ARM binary. That’s why an x86 program doesn’t just run on an ARM CPU.
ISA and CPU design aren’t the same thing. The ISA is the visible instruction interface. The microarchitecture is the internal circuitry that decides how those instructions actually execute. That’s why Intel and AMD both build x86 CPUs but ship completely different cores.
ISA isn’t a technical taxonomy. It defines the software ecosystem, the licensing structure, the entry barrier, and the monetization model all at once. To see who can make money in CPUs, you start with ISA.
In modern data center CPUs, three ISAs matter: x86, ARM, and RISC-V. There are several ways to slice ISAs, but the most useful axis for investors today is x86’s CISC family versus the RISC family that includes ARM and RISC-V.
x86: A Closed Incumbent Built on Legacy Compatibility
x86 is in the CISC family. CISC stands for Complex Instruction Set Computing, an approach that includes a relatively large set of complex instructions. A single instruction can handle both memory access and computation, which improves code density but makes the decoder more complex.
Modern x86 CPUs internally crack complex x86 instructions into simpler micro-ops before executing them. So the surface is CISC but the internal execution looks closer to RISC. Carrying nearly fifty years of compatibility still leaves a real burden on the decoder and front-end.
x86’s biggest weapon isn’t raw performance. It’s legacy compatibility.
Enterprise databases, virtualization, ERP, SAP, Oracle, all of these have been validated on x86 servers for decades. For a large company, switching CPUs isn’t swapping a chip. It’s redoing software certification, operational stability, and the entire maintenance stack.
The licensing structure is also a strong moat. The high-performance server x86 market is essentially a duopoly between Intel and AMD. VIA and Zhaoxin exist as exceptions but have no meaningful share in mainstream data center. New entry into x86 is effectively impossible.
The weaknesses are clear too. x86 trails ARM in power efficiency and customization freedom. Hyperscalers in particular want to design their own CPUs around their own workloads, and x86 offers almost none of that flexibility.
So x86 stays strong in general enterprise while ARM eats into hyperscaler internal workloads quickly.
ARM: The Language of Power Efficiency and Customization
ARM is in the RISC family. RISC stands for Reduced Instruction Set Computing, a design philosophy that keeps instructions simple and separates load and store. Instructions get simpler, code length can grow, but decoders get easier to build and power efficiency goes up.
This is exactly why ARM owned mobile. In smartphones, power efficiency mattered more than raw performance, and ARM fit that constraint best.
The same logic is now climbing into the data center. As power and cooling costs in AI data centers explode, performance-per-watt becomes the metric that matters.
ARM’s other strength is its licensing model. A company can license the ARM ISA and design its own core, or take an ARM-designed Cortex or Neoverse core off the shelf. Apple, Qualcomm, NVIDIA, and AWS each design or customize ARM-based CPUs for their own products.
In data center, the line that matters is Neoverse. The high-performance V-series goes into NVIDIA Grace, AWS Graviton4, and Google Axion. The N-series targets server designs that emphasize core count and power efficiency. The E-series leans toward low-power infrastructure and edge.
The advantages are obvious. Power efficiency is good, and hyperscalers can tune core count, cache, and I/O to fit their workloads. That’s why AWS Graviton, Google Axion, Microsoft Cobalt, and NVIDIA Grace are all ARM-based.
The investor-side weakness is monetization. ARM doesn’t sell chips. It collects license fees and royalties. Even if ARM-based CPU share rises, the system ASP that NVIDIA or AWS captures doesn’t flow back to ARM.
ARM can be a share winner without being a system margin winner.
RISC-V: Maximum Freedom, Immature Ecosystem
RISC-V is also in the RISC family. The decisive difference from ARM is that it’s an open standard. The ISA itself is published, and anyone can use it without a license fee. Implementations can be open-source or proprietary.
The core point of RISC-V is freedom. On top of a base instruction set, custom extensions get added in a modular way: data types for AI acceleration, security features, vector ops, special instructions tuned to a specific workload. No license negotiation like ARM. No closed ecosystem like x86.
That matters to hyperscalers and AI chip startups. When AI workloads are moving fast, being able to extend and modify the ISA is an asset. Tenstorrent, SiFive, Esperanto, Andes Technology, Alibaba T-Head, and Xiangshan are all building on RISC-V for that reason.
NVIDIA isn’t ignoring RISC-V either. NVIDIA has been using RISC-V inside its GPUs for internal controllers for years, and recent moves suggest it’s opening up RISC-V CPUs as a host CPU option in the NVIDIA GPU ecosystem. This isn’t about CUDA running on a RISC-V GPU. It’s that a RISC-V CPU can play the host role for an NVIDIA GPU.
The weakness is just as clear. The data-center-grade software ecosystem isn’t yet as mature as x86 or ARM. OS, compilers, hypervisors, cloud stacks, and enterprise software certification all need more time. An open ISA is one thing. Running at scale in production data centers is another.
So RISC-V today isn’t a player taking large data center CPU share. It’s a longer-term wildcard that could eventually shake the cost structure and customization model sitting between ARM and x86.
Reading the Three ISAs as an Investor
By analogy, x86 is closer to Windows. Old and heavy, but with overwhelming compatibility and installed base. In enterprise, that legacy is a serious moat.
ARM is closer to Android. Multiple companies build their own products under license, and the strengths are power efficiency and customization. ARM sits at the center of every hyperscaler’s in-house CPU effort.
RISC-V is closer to Linux. Maximum freedom and the largest long-term potential, but the ecosystem is still catching up. For now it’s mostly private companies, internal controllers, and special-purpose accelerators. Over time it can reshape the data center CPU market structure.
ISA differences aren’t just engineering preferences. x86 connects to Intel and AMD’s socket margin. ARM connects to hyperscaler in-house chips and the royalty model. RISC-V connects to zero license cost and custom-silicon optionality.
So the right question for this CPU cycle isn’t “which ISA is better.”
The better question is this:
Whose revenue and margin does each ISA’s technical advantage actually convert into.
In Data Center, the Strong ISA and the Profitable Company Aren’t the Same
x86 is still the center of the data center CPU market. In general enterprise servers especially, legacy software compatibility is a serious moat. Databases, virtualization, ERP, certification matrices have all been validated on x86 for years, so most enterprises can’t move to ARM easily. That’s why Intel and AMD still take the bulk of data center CPU revenue.
Hyperscalers are different. AWS, Google, and Microsoft know their workloads cold and control their own software stacks. Power efficiency, TCO, and customization can matter more to them than legacy compatibility. Which is why ARM-based CPUs like AWS Graviton, Google Axion, Microsoft Cobalt, and NVIDIA Grace are scaling fast.
RISC-V isn’t yet mainstream in data center. The advantages are real. No license cost, freedom to add the instructions and extensions you need. As AI workloads get more specialized, that freedom looks attractive. But running at scale in actual data centers requires deeper OS, compiler, hypervisor, cloud, and certification stacks. For now it’s a long-term wildcard.
The numbers still favor x86. As of Q2 2025, Intel and AMD combined hold roughly 75% of data center CPU share, ARM around 25%, with RISC-V below measurable levels. ARM, though, sees its share inside the top hyperscalers climbing faster.
What matters more than the share figure itself is whose revenue and margin that share connects to.
Anyone can say CPU becomes a bottleneck in the AI agent era.
Looking at how the stocks are moving, CPU demand is clearly turning. Figuring out which company actually benefits, and from what angle, is a separate problem.
You need the technology, the industry structure, the asset stack, the monetization model, and what’s already in the price versus what isn’t.
What follows is a deep dive on the five major CPU companies, plus six forward-looking scenarios and which name fits best inside each. If you’re thinking about how to position for the CPU bottleneck, this is the part to read carefully.
