Interview October 25, 2026 · US Pacific time · About 92 minutes
Host and editor Damnang
Expert An engineer at a global semiconductor equipment company with a background in memory devices and process development
Where the discussion starts
New DRAM roadmaps keep drawing attention to 4F² cells, vertical channels and 3D DRAM. Much of the discussion focuses on which company will adopt them first. In this call, we asked what a new structure actually delivers in production. Does it produce more good chips at a lower cost? And how much does that calculation differ from one company to another?
Our guest has developed memory devices and processes and now studies how changes in DRAM technology shape future equipment requirements. We discussed the history of scaling, the payback on 4F² development, the manufacturing challenges of 3D DRAM, China’s progress and the meaning of volume production. The conversation also covered supply and demand, process choices for HBM, competing memory technologies, EUV productivity, and how changes in AI reach equipment roadmaps.
Key takeaways
A structure’s name tells you little about the technology gap.
Actual cell dimensions, yield, process cost and production scale matter. The same architecture can have different economics at companies starting from different positions.
3D DRAM needs an economical way to build the stack.
Demonstrating a structure and making it at a speed and cost suitable for volume production are separate achievements. Equipment throughput and productivity become critical.
The premium for HBM performance changes process decisions.
Customers willing to pay for better performance can justify initial costs that would be harder to absorb in commodity DRAM.
Market conditions change the value of equipment.
Fewer process steps can reduce unit costs and increase output within limited fab space. During a shortage, the value of that additional output can carry more weight.
Table of Contents
From memory development to equipment roadmaps
How DRAM structures converged and why scaling matters
Why companies make different choices on 4F²
3D DRAM structures, silicon and equipment speed
The benchmarks for assessing China’s progress
EUV restrictions, equipment performance and cost
Capacity expansion, demand and the pace of process transitions
How HBM changes process choices and memory economics
DRAM on logic and new memory tiers
Competing with a memory technology that keeps improving
Evaluating EUV across the whole fab
Changing demand and the equipment roadmap
Editorial note
The conversation lasted approximately 92 minutes and was reorganized into 40 questions and answers around the central argument of this article. AI was used to help summarize and organize the discussion. The expert’s views are personal and do not represent the official position of their employer. The employer’s name has been withheld at the expert’s request.