Damnang Research

Damnang Research

Intel's Process and System Technologies and Business Competitiveness

Customer Value in 18A and 14A and Application Requirements for AI Memory Research

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Damnang
Sep 17, 2026
∙ Paid

This article is based on an expert call lasting one to two hours.

I plan to publish more institutional style expert call reports like this regularly on my Substack. I hope you will continue to follow and support my work.

Note: After organizing the content, I asked AI to help summarize and edit it. Please note that some signs of AI assistance may be present in the writing.


Interview Overview

This conversation examined the benefits Intel’s process improvements can offer customers and the technologies needed to address power and memory challenges in AI systems.

Drawing on my experience in foundry design and memory research, I asked about the conditions for applying these technologies. The expert described research he had conducted and system configurations he had evaluated. The discussion moves from how the technologies work to customer choices, the value of memory capacity, and foundry competitiveness.

Expert Background

The expert is a researcher in Intel’s Technology Research organization.

After working in DTCO (Design Technology Co-Optimization), jointly optimizing memory devices, circuits and layouts, he now studies server power delivery and memory configurations from an STCO (System Technology Co-Optimization) perspective.

Depending on the technology, the organization conducts research looking approximately 3 to 15 years ahead.

Customer contracts and the commercial terms of individual businesses are outside the scope of his direct work.

Key Discussion Points

  • Improvements to routing and power delivery paths in 18A and 14A should be assessed against customers’ performance, power consumption and thermal requirements.

  • System research considers losses in both power delivery and data movement. Integrating GaN with silicon is one research direction for improving power delivery.

  • Changes in HBM stack height need to be considered alongside total capacity, space for connections and communication latency. The discussion compares Damnang’s software efficiency hypothesis with the expert’s inference example.

  • The discussion examines the ability to offer design experience, process technology and packaging together, and the conditions needed to turn those capabilities into customer use and business results.

Editorial Note

Damnang’s and the expert’s remarks are identified by speaker. Commentary presents editorial interpretations of the business and investment implications, based on the discussion. The expert’s name and material discussed on a private basis have been omitted.

Views and expectations reflect each speaker’s judgment at the time of the interview. The final additional comment was included at the expert’s request.

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1. How 18A and 14A Change Customer Chip Design

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What has changed most with 18A compared with previous processes?

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